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| 1CY7C271A CY7C271A 32K x 8 Power Switched and Reprogrammable PROM Features * CMOS for optimum speed/power * Windowed for reprogrammability * High speed -- 25 ns (Commercial) * Low power -- 275 mW (Commercial) * Super low standby power -- Less than 85 mW when deselected * EPROM technology 100%programmable * Slim 300-mil package * Direct replacement for bipolar PROMs * Capable of withstanding >4001V static discharge automatically powers down into a low-power stand-by mode. The CY7C271A is packaged in the 300-mil slim package and is available in a cerDIP package equipped with an erasure window to provide for reprogrammability. When exposed to UV light, the PROM is erased and can be reprogrammed. The memory cells utilize proven EPROM floating gate technology and byte-wide intelligent programming algorithms. The CY7C271A offers the advantages of lower power, superior performance, and programming yield. The EPROM cell requires only 12.5V for the super voltage, and low current requirements allow for gang programming. The EPROM cells allow each memory location to be tested 100% because each location is written into, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that after customer programming, the product will meet DC and AC specification limits. Reading the 7C271A is accomplished by placing active LOW signals on CS1 and CE, and an active HIGH on CS2. The contents of the memory location addressed by the address lines (A0-A14) will become available on the output lines (O0-O7). Functional Description The CY7C271A is a high-performance 32,768-word by 8-bit CMOS PROM. When disabled (CE HIGH), the 7C271A Logic Block Diagram O7 Pin Configurations DIP/Flatpack A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 O3 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A10 A11 A12 A13 A14 CS1 CS2 CE O7 O6 O5 O4 O3 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Y ADDRESS X ADDRESS 256 x 1024 PROGRAMABLE ARRAY 8 x 1 OF 128 MULTIPLEXER O6 O5 O4 O2 PLCC Top View A5 A6 A7 NC VCC A8 PS A4 A3 A2 A1 A0 NC O0 4 3 2 1 28 27 26 25 5 24 6 23 7 22 8 21 9 20 10 19 11 12 13 141516 17 18 O1 O2 GND NC O3 O4 O5 E CLR ES CP NC O7 O6 O1 POWER-DOWN O0 CE CS1 CS2 Cypress Semiconductor Corporation Document #: 38-04013 Rev. *B * 3901 North First Street * San Jose * CA 95134 * 408-943-2600 Revised December 28, 2002 CY7C271A Selection Guide 7C271A-25 Maximum Access Time Maximum Operating Current Standby Current Com'l Com'l 25 75 15 7C271A-30 30 75 15 7C271A-35 35 50 15 7C271A-45 45 50 15 Unit ns mA mA Maximum Ratings[1] (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. -65C to +150C Ambient Temperature with Power Applied............................................. -55C to +125C Supply Voltage to Ground Potential ............... -0.5V to +7.0V DC Voltage Applied to Outputs in High Z State ............................................... -0.5V to +7.0V DC Input Voltage............................................ -3.0V to +7.0V DC Program Voltage .................................................... 13.0V Static Discharge Voltage............................................ >4001V (per MIL-STD-883, Method 3015) Latch-Up Current..................................................... >200 mA UV Exposure ................................................ 7258 Wsec/cm2 Operating Range Range Commercial Ambient Temperature 0C to +700C VCC 5V 10% Electrical Characteristics Over the Operating Range[2, 3] 7C271A-25 7C271A-30 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB Description Output HIGH Voltage Output LOW Voltage Input HIGH Level Input LOW Level Input Leakage Current Output Leakage Current Output Short Circuit Current[4] Power Supply Current Stand-By Current Test Conditions VCC = Min., IOH = -2.0 mA VCC = Min., IOL = 8.0 mA Guaranteed Input Logical HIGH Voltage for All Inputs Guaranteed Input Logical LOW Voltage for All Inputs GND < VIN < VCC GND < VOUT < VCC, Output Disable VCC = Max., VOUT = GND VCC=Max., IOUT = 0 mA, f = 10 MHz VCC=Max., CE = VIH Com'l Com'l -10 -10 -20 2.0 Min. 2.4 0.4 VCC 0.8 +10 +10 -90 75 15 -10 -10 -20 2.0 Max. 7C271A-35 Min. 2.4 0.4 VCC 0.8 +10 +10 -90 50 15 -10 -10 -20 2.0 Max. 7C271A-45 Min. 2.4 0.4 VCC 0.8 +10 +10 -90 50 15 Max. Unit V V V V A A mA mA mA Capacitance[3] Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 10 10 Unit pF pF Notes: 1. The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. See the last page of this specification for Group A subgroup testing information. 3. See Introduction to CMOS PROMs in this Data Book for general information on testing. 4. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds. Document #: 38-04013 Rev. *B Page 2 of 10 CY7C271A AC Test Loads and Waveforms R1 500 658 MIL R1 500 658 MIL ALL INPUT PULSES 90% 5 pF INCLUDING JIG AND SCOPE R2 333 GND 403 MIL 10% 5 ns 90% 10% 5 ns 5V OUTPUT 30 pF INCLUDING JIG AND SCOPE 5V OUTPUT R2 333 403 MIL 3.0V (a) NormalLoad Equivalent to: (b) High-Z Load THEVENIN EQUIVALENT 200 2.00V Commercial 250 MIL 1.90V MIL OUTPUT Switching Characteristics Over the Operating Range[2, 3] 7C271A-25 Parameter tAA tACS tACE tHZCS tHZCE tPU tPD tOH Description Address to Output Valid CS1/CS2 Active to Output Valid CE Active to Output Valid CS1/CS2 Inactive to High Z CE Inactive to High Z CE Active to Power-Up CE Inactive to Power-Down Output Data Hold 0 0 30 0 Min. Max. 25 12 30 12 12 0 35 0 7C271A-30 Min. Max. 30 18 35 18 18 0 40 0 7C271A-35 Min. Max. 35 18 35 18 18 0 40 7C271A-45 Min. Max. 45 18 45 18 18 Unit ns ns ns ns ns ns ns ns Document #: 38-04013 Rev. *B Page 3 of 10 CY7C271A Switching Waveform ICC tPU CE tPD CS2 CS1 ACTIVE INACTIVE ACTIVE A0 - A14 ADDRA tAA tACE tAA ADDRB tHZCS tOH tACS tHZCE DATA B O0 - O7 DATA A DATA B Erasure Characteristics Wavelengths of light less than 4000 Angstroms begin to erase the CY7C271A in the windowed package. For this reason, an opaque label should be placed over the window if the PROM is exposed to sunlight or fluorescent lighting for extended periods of time. The recommended dose of ultraviolet light for erasure is a wavelength of 2537 Angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time would be approximately 35 minutes. The CY7C271A Table 1. Programming Electrical Characteristics Parameter VPP IPP VIHP VILP VCCP Description Programming Power Supply Programming Supply Current Programming Input Voltage HIGH Programming Input Voltage LOW Programming VCC needs to be within 1 inch of the lamp during erasure. Permanent damage may result if the PROM is exposed to high-intensity UV light for an extended period of time. 7258 Wsec/cm2 is the recommended maximum dosage. Programming Modes Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative. Min. 12.5 Max. 13 50 Unit V mA V V V 3.0 -0.5 6.0 VCC 0.4 6.5 Document #: 38-04013 Rev. *B Page 4 of 10 CY7C271A Table 2. Mode Selection Pin Function[5] Mode Read Output Disable Output Disable Stand-by Program Program Verify Program Inhibit Signature (MFG) Signature (DEV) Note: 5. X can be VIL or 6. VHV=120.5V CS1/VPP VIL VIH VIL X VPP VPP VPP VILP VILP CS2/PGM VIH VIH VIL X VILP VIHP VIHP VILP VILP CE/VFY VIL VIL VIL VIH VIHP VILP VIHP VILP VILP A0 A0 A0 A0 A0 A0 A0 X VILP VIHP A9 A9 A9 A9 A9 A9 A9 X VHV[6] VHV[6] Data O7-O0 High Z High Z High Z D7-D0 O7-O0 X 34H 20H VIH. Programming Pinouts DIP Top View A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 PS E VPP VFY PGM D7 D6 D5 D4 D3 A4 A3 A2 A1 A0 NC D0 PLCC Top View A5 A6 A7 NC V CC A8 PS 4 3 2 1 28 27 26 25 5 24 6 23 7 22 8 21 9 20 10 19 11 12 1314151617 18 D1 D2 GND NC D3 D4 D5 E VPP VFY PGM NC D7 D6 Document #: 38-04013 Rev. *B Page 5 of 10 CY7C271A Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT vs. CYCLE PERIOD 1.1 NORMALIZED ICC 1.0 NORMALIZED ICC 0.9 0.8 0.7 0.6 0.5 0.0 50 100 150 200 CLOCK PERIOD (ns) 250 VCC =5.5V TA =25C 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 4 NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.25 1.2 NORMALIZED ICC 1.15 1.1 1.05 1.0 0.95 0.9 0.85 0.8 -100 VCC = 5.5V f = 10 MHz NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE f = 10 MHz TA = 25C 4.5 5 5.5 6 -50 0 50 100 150 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (C) NORMALIZED ACCESS TIME 1.2 1.15 1.1 1.05 1.0 0.95 0.9 0.85 4 4.5 5 5.5 6 SUPPLYVOLTAGE (V) TA = 25C NORMALIZED ACCESS TIME 1.25 OUTPUT SINK CURRENT (mA) NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.4 1.3 1.2 1.1 1.0 0.9 NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC = 5.0V TA = 25C VCC = 4.5V 0.8 -100 -50 0 50 100 150 AMBIENT TEMPERATURE (C) OUTPUT VOLTAGE (V) OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE OUTPUT SOURCE CURRENT -100 -80 -60 -40 -20 0.0 0.0 1.0 2.0 3.0 4.0 5.0 OUTPUT VOLTAGE (V) C271A-9 Document #: 38-04013 Rev. *B Page 6 of 10 CY7C271A Ordering Information Speed (ns) 25 30 35 Ordering Code CY7C271A-25JC CY7C271A-30PC CY7C271A-35PC CY7C271A-35WC 45 CY7C271A-45WC Package Name J65 P21 P21 W22 W22 Package Type 32-Lead Plastic Leaded Chip Carrier 28-Lead (300-Mil) Molded DIP 28-Lead (300-Mil) Molded DIP 28-Lead (300-Mil) Windowed CerDIP 28-Lead (300-Mil) Windowed CerDIP Commercial Operating Range Commercial Commercial Commercial MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter VOH VOL VIH VIL IIX IOZ ICC ISB Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 Switching Characteristics Parameter tAA tACS tACE Subgroups 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 Document #: 38-04013 Rev. *B Page 7 of 10 CY7C271A Package Diagrams 28-Lead (300-Mil) Molded DIP P21 51-85014-*B 32-Lead Plastic Leaded Chip Carrier J65 51-85002-*B Document #: 38-04013 Rev. *B Page 8 of 10 CY7C271A Package Diagrams (continued) 28-Lead (300-Mil) Windowed CerDIP W22 MIL-STD-1835 D-15 Config. A 51-80087-** All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-04013 Rev. *B Page 9 of 10 (c) Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C271A Document History Page Document Title: CY7C271A 32K x 8 Power Switched and Reprogrammable PROM Document Number: 38-04013 REV. ** *A *B ECN NO. 114409 118899 122254 Issue Date 3/26/02 9/13/02 12/26/02 Orig. of Change DSG GBI RBI Description of Change Change from Spec number: 38-00424 to 38-04013 Update Ordering Information Add power up requirements to maximum ratings information Document #: 38-04013 Rev. *B Page 10 of 10 |
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